RISC-V Instructions explorerExpand all|Collapse allArithmetic3addrd = rs1 + rs2addird = rs1 + imm12 (signed)subrd = rs1 - rs2Branch6beqif (rs1 = rs2); PC += imm13bgeif (rs1 >= rs2); PC += imm13 (signed)bgeuif (rs1 >= rs2); PC += imm13 (unsigned)bltif (rs1 < rs2); PC += imm13 (signed)bltuif (rs1 < rs2); PC += imm13 (unsigned)bneif (rs1 != rs2); PC += imm13Compare4sltrd = (rs1 < rs2) ? 1 : 0 (signed)sltird = (rs1 < imm12) ? 1 : 0 (signed)sltiurd = (rs1 < imm12) ? 1 : 0 (unsigned)slturd = (rs1 < rs2) ? 1 : 0 (unsigned)Jump2jalrd = PC + 4; PC += imm21 (signed)jalrrd = PC + 4; PC = (rs1+imm12 (signed)) & ~1Load5lbrd = mem[rs1+imm12] (byte)lburd = mem[rs1+imm12] (byte, unsigned)lhrd = mem[rs1+imm12] (halfword)lhurd = mem[rs1+imm12] (halfword, unsigned)lwrd = mem[rs1+imm12] (word)Logic6andrd = rs1 & rs2andird = rs1 & imm12orrd = rs1 | rs2orird = rs1 | imm12xorrd = rs1 ^ rs2xorird = rs1 ^ imm12Shift6sllrd = rs1 << rs2sllird = rs1 << shamt5srard = rs1 >> rs2 (arithmetical)sraird = rs1 >> shamt5 (arithmetical)srlrd = rs1 >> rs2 (logical)srlird = rs1 >> shamt5 (logical)Store3sbmem[rs1+imm12] = rs2 (byte)shmem[rs1+imm12] = rs2 (halfword)swmem[rs1+imm12] = rs2 (word)Upper Imm2auipcrd = PC + (imm20 << 12)luird = imm20 << 12 All instructions HEXLE BE LE